SMH4814
Preliminary Information
I2C 2-WIRE SERIAL INTERFACE (CONTINUED)
Figure 21 - Typical EE Memory Write and Random Read Operations
Register Access
The configuration registers may be locked out by
setting bit 5 of register 0x0F high. This is a one-time,
non-reversible operation.
The SMH4814 has two virtual address pins, A[2:1] (set
with R0F[7:6]), associated with the 2-wire bus. The
SMH4814 can be configured to respond to:
The SMH4814 contains a 2-wire bus interface for
register access as explained in the previous section.
This bus is highly configurable, while maintaining the
industry standard protocol. The SMH4814 responds to
one of two selectable Device Type Addresses:
1010BIN, generally assigned to NV-memories and the
default address for the SMH4814, or 1011BIN. The
Device Type Address is assigned by programming bit
3 of Register 0x0F.
1. only to the proper serial data string of the
Device Type Address and specific bus
addresses (Register 0x0F, bit 4 cleared).
2. the Device Type Address and any bus
address (Register 0x0F, bit 4 set).
Slave Address Bus Address Register Type
Command and Status Registers,
1001BIN
A2 A1 0
1010BIN
or
A2 A1 0
A2 A1 1
2-k Bits of General-Purpose Memory
Configuration Registers
1011BIN
Table 2 - Address bytes used by the SMH4814.
Summit Microelectronics, Inc
2080 2.0 07/21/05
26
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
