SMH4042
CompactPCI Applications Aid
Power Switching Options
The figures below illustrate four possible methods for wiring the SMH4042. In the first example both power-FETs are
connected to a single VGATE output. This should be used when the design requires the backend voltages to be
powered-up simultaneously. In the second example both VGATE outputs are being used so that the 3.3V slew lags
the 5V slew. The two bottom circuits illustrate the wiring for single power supply boards. Note how the VSEL pin is
biased differently for the two applications.
.01Ω
.01Ω
VCC
CBI_5
VCC
CBI_5
D
D
100Ω
100Ω
G
G
VGATE5
VGATE5
47nF
S
S
+5V
+5V
CARD_5V_MON
CARD_5V_MON
±
5%
±
5%
5A max
5A max
+3.3V ±.3V
+3.3V ±.3V
CARD_3V_MON
VSEL
CARD_3V_MON
VSEL
7.6A max
7.6A max
S
S
D
100Ω
100
Ω
G
G
VGATE3
VGATE3
47nF
47nF
D
CBI_3
CBI_3
HST_3V_MON
HST_3V_MON
.0065Ω
.0065Ω
Dual Voltage, Single Slew Rate Implementation
Dual Voltage, Dual Slew Rate Implementation
Note: If the backend circuits
that are being powered are
not sufficiently decoupled,
the value of this resistor
may need to be increased to
as high as 10K ohm
.01Ω
VCC
CBI_5
VCC
CBI_5
D
S
100Ω
G
VGATE5
VGATE5
47nF
CARD_5V_MON
+5V
5%
5A max
CARD_5V_MON
±
VSEL
+3.3V ±.3V
7.6A max
CARD_3V_MON
VSEL
CARD_3V_MON
S
D
100
Ω
G
VGATE3
VGATE3
47nF
CBI_3
CBI_3
HST_3V_MON
HST_3V_MON
.0065Ω
2037 ILL26.2
Single 3.3Volt Implementation
Single 5Volt Implementation
Figure 5. Four power switching implementations
2037-07 9/23/99
17
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
