SMH4042
CompactPCI Applications Aid
Design Considerations for a CompactPCI Board
Figure 2 is a generic representation of a CompactPCI board and it illustrates how the SMH4042 is the key component
intheboardinsertion/removalprocess.Theillustrationsthatfollowshowinmoredetailhowthevariousblocksinterface
to the SMH4042.
Backend Power Plane
and Logic
P2
Current
sense
resistors
Backend Power
SwitchingCircuits
Precharge
Circuit
V(I/O)
eP
SGNL_VLD
CBI_3
1Vref
VCC5
ENUM#
CBI_5
V(I/O)
5V
HST_3V_MON
3.3V
CARD_3V_MON
CARD_5V_MON
Current
V(I/O)
V(I/O)
limiting
resistors
GND
GND
VGATE3
VGATE5
BD_SEL#
BD_SEL2#
GND
Capacitance
8.8 µf each
eP
V(I/O)
GND
GND
GND
LOCAL_PCI_RST#
BD_SEL1#
RESET
3.3V
PCI_RST#
HEALTHY#
GND, PCI_RST#
HEALTHY#
5V
5V
SMH4042
+12V, -12V
P1
2037 ILL23.1
Figure 2. Block diagram of typical CompactPCI board.
Power Busses
It is important in the design of the board to insure the backend logic is isolated from the power control circuits and other
early power circuits such as FPGAs and the I/O interface circuits. In the illustration shown below, the early power
busses for +5V, +3V have series current limiting resistors. These values should be calculated so as to limit the in-rush
currentthatwillinitiallychargethecapacitiveloadoftheearlypowercircuits.Asthecardisinsertedfurther,themedium
lengthpinsengageandshortoutthecurrentlimitingresistors. Notetheplacementofthesense(shunt)resistors. They
are in series with the power-FETs and no voltage drop will be detected across the resistor until VGATE is applied to
the power-FETs. The sense resistor values are determined by dividing 50mV by the current spec for that supply.
It should be noted that there is an inherent delay from VGATE turning on to VGATE3 turning on. The typical delay is
illustrated in Figure 4.
2037-07 9/23/99
15
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
