STNRGPF01 block diagram
STNRGPF01
3.1
Voltage and current loop
The STNRGPF01 implements mixed signal average current control. The task of the digital
voltage loop is to regulate the output voltage of the PFC. The VIN and IOUT measurements
are used to implement the input/output feed-forward (I/O FFD), so load steps or input
voltage variations are quickly compensated for by acting on digital PI output calculations.
This function allows keeping the output voltage at the set point value and as constant as
possible (see Figure 3).
Figure 3. Voltage loop and current reference
The output of the digital PI controller is the peak current reference. In order to obtain a
sinusoidal current reference, the I
is multiplied by a lookup table (LUT). The LUT is
pk_ref
synchronized with the input voltage thanks to the ZVD signal (pin 17). The output of the
multiplier is a PWM signal with a sinusoidal duty cycle that is configured on pin 19 SIN REF.
An analog filter is used to obtain the final sinusoidal current reference for the external
current loop (i
). The analog PI current compares the reference i
with the total input
tot_ref
tot_ref
current feedback (i
) and generates the duty cycle wave for the PWM modulation. The
tot_fb
master PWM signal is obtained by comparing (COMP2,3) the output of the PI current with a
triangular wave at switching frequency (see Figure 6: Analog comparators section and
Section 3.4: Driving and interleaving).
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