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STM8S207R8T6C 参数 Datasheet PDF下载

STM8S207R8T6C图片预览
型号: STM8S207R8T6C
PDF下载: 下载PDF文件 查看货源
内容描述: 性能线, 24兆赫STM8S 8位MCU ,高达128 KB闪存,集成的EEPROM , 10位ADC ,定时器, 2个UART , SPI , I²C , CAN [Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN]
分类和应用: 闪存微控制器和处理器外围集成电路装置PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 103 页 / 1740 K
品牌: STMICROELECTRONICS [ ST ]
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STM8S207xx, STM8S208xx  
2
Electrical characteristics  
10.3.9  
I C interface characteristics  
2
Table 43. I C characteristics  
Standard mode I2C Fast mode I2C(1)  
Symbol Parameter  
Unit  
Min(2)  
Max(2)  
Min(2) Max(2)  
tw(SCLL) SCL clock low time  
tw(SCLH) SCL clock high time  
tsu(SDA) SDA setup time  
4.7  
4.0  
1.3  
0.6  
µs  
250  
0(3)  
100  
th(SDA)  
SDA data hold time  
0(4)  
900(3)  
300  
tr(SDA)  
tr(SCL)  
ns  
SDA and SCL rise time  
1000  
300  
tf(SDA)  
tf(SCL)  
SDA and SCL fall time  
300  
th(STA)  
START condition hold time  
4.0  
4.7  
4.0  
0.6  
0.6  
0.6  
µs  
tsu(STA) Repeated START condition setup time  
tsu(STO) STOP condition setup time  
µs  
µs  
pF  
STOP to START condition time  
tw(STO:STA)  
(bus free)  
4.7  
1.3  
Cb  
Capacitive load for each bus line  
400  
400  
1. fMASTER, must be at least 8 MHz to achieve max fast I2C speed (400kHz)  
Data based on standard I2C protocol requirement, not tested in production  
2.  
The maximum hold time of the start condition has only to be met if the interface does not stretch the low  
time  
3.  
4.  
The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the  
undefined region of the falling edge of SCL  
Doc ID 14733 Rev 9  
81/103