欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM8S207R8T6C 参数 Datasheet PDF下载

STM8S207R8T6C图片预览
型号: STM8S207R8T6C
PDF下载: 下载PDF文件 查看货源
内容描述: 性能线, 24兆赫STM8S 8位MCU ,高达128 KB闪存,集成的EEPROM , 10位ADC ,定时器, 2个UART , SPI , I²C , CAN [Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN]
分类和应用: 闪存微控制器和处理器外围集成电路装置PC可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 103 页 / 1740 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM8S207R8T6C的Datasheet PDF文件第74页浏览型号STM8S207R8T6C的Datasheet PDF文件第75页浏览型号STM8S207R8T6C的Datasheet PDF文件第76页浏览型号STM8S207R8T6C的Datasheet PDF文件第77页浏览型号STM8S207R8T6C的Datasheet PDF文件第79页浏览型号STM8S207R8T6C的Datasheet PDF文件第80页浏览型号STM8S207R8T6C的Datasheet PDF文件第81页浏览型号STM8S207R8T6C的Datasheet PDF文件第82页  
Electrical characteristics  
STM8S207xx, STM8S208xx  
SPI serial peripheral interface  
10.3.8  
Unless otherwise specified, the parameters given in Table 42 are derived from tests  
performed under ambient temperature, f frequency and V supply voltage  
MASTER  
DD  
conditions. t  
= 1/f  
.
MASTER  
MASTER  
Refer to I/O port characteristics for more details on the input/output alternate function  
characteristics (NSS, SCK, MOSI, MISO).  
Table 42. SPI characteristics  
Symbol  
Parameter  
Conditions  
Master mode  
Slave mode  
Min  
Max  
Unit  
0
0
10  
6
fSCK  
1/tc(SCK)  
SPI clock frequency  
MHz  
tr(SCK)  
tf(SCK)  
SPI clock rise and fall time Capacitive load: C = 30 pF  
25  
(1)  
tsu(NSS)  
NSS setup time  
NSS hold time  
Slave mode  
Slave mode  
4 x tMASTER  
70  
(1)  
th(NSS)  
(1)  
tw(SCKH)  
tw(SCKL)  
SCK high and low time  
Data input setup time  
Master mode  
tSCK/2 - 15  
tSCK/2 + 15  
(1)  
(1)  
Master mode  
5
5
tsu(MI)  
tsu(SI)  
(1)  
Slave mode  
ns  
(1)  
Master mode  
7
th(MI)  
th(SI)  
Data input hold time  
(1)  
Slave mode  
10  
(1)(2)  
(1)(3)  
ta(SO)  
Data output access time  
Data output disable time  
Data output valid time  
Data output valid time  
Slave mode  
3 x tMASTER  
tdis(SO)  
tv(SO)  
tv(MO)  
th(SO)  
Slave mode  
25  
(1)  
(1)  
(1)  
(1)  
Slave mode (after enable edge)  
Master mode (after enable edge)  
Slave mode (after enable edge)  
Master mode (after enable edge)  
75  
30  
31  
12  
Data output hold time  
th(MO)  
1. Values based on design simulation and/or characterization results, and not tested in production.  
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate the data.  
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.  
78/103  
Doc ID 14733 Rev 9  
 复制成功!