Electrical characteristics
STM8S003K3 STM8S003F3
Table 44: ADC characteristics
Conditions
Symbol Parameter
fADC ADC clock frequency
Min
Typ Max Unit
VDD =2.95 to 5.5 V
VDD =4.5 to 5.5 V
1
4
MHz
6
1
VAIN Conversion voltage range(1)
VSS
VDD
V
CADC Internal sample and hold
capacitor
3
pF
(1)
tS
Minimum sampling time
fADC = 4 MHz
fADC = 6 MHz
0.75
0.5
7
μs
tSTAB Wake-up time from standby
μs
tCONV Minimum total conversion time fADC = 4 MHz
(including sampling time,
3.5
2.33
14
μs
10-bit resolution)
fADC = 6 MHz
μs
1/fADC
(1) During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged
by the external source. The internal resistance of the analog source must allow the
capacitance to reach its final voltage level within tS. After the end of the sample time tS,
changes of the analog input voltage have no effect on the conversion result. Values for the
sample clock tS depend on programming.
Table 45: ADC accuracy with RAIN < 10 kΩ , VDD= 5 V
Symbol
Parameter
Conditions
Typ
Max(1) Unit
|ET|
Total unadjusted error(2)
fADC = 2 MHz
1.6
3.5
fADC = 4 MHz
fADC = 6 MHz
fADC = 2 MHz
2.2
2.4
1.1
4
LSB
4.5
|EO|
Offset error(2)
2.5
82/99
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