Electrical characteristics
STM8S003K3 STM8S003F3
(1) Data based on characterization results, not tested in production.
(2) The physical granularity of the memory is 4 bytes, so cycling is performed on 4 bytes
even when a write/erase operation addresses a single byte.
9.3.6
I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All unused
pins must be kept at a fixed voltage: using the output mode of the I/O for example or an
external pull-up or pull-down resistor.
Table 37: I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
0.3 x
VDD
Unit
VIL
VDD = 5 V
Input low level voltage
-0.3 V
V
VIH
VDD
0.3
+
0.7 x
VDD
Input high level voltage
Vhys
Rpu
Hysteresis(1)
700
55
mV
kΩ
VDD = 5 V, VIN = VSS
30
80
Pull-up resistor
tR, tF
Fast I/Os
20 (2)
Rise and fall time
(10 % - 90 %)
Load = 50 pF
ns
Standard and high sink
I/Os
125 (2)
Load = 50 pF
±1 (2)
Ilkg
VSS ≤ VIN ≤VDD
μA
nA
Digital input leakage current
Analog input leakage current
±250 (2)
Ilkg ana
Ilkg(inj)
VSS ≤ VIN ≤ VDD
Injection current ±4 mA
±1 (2)
Leakage current in adjacent
I/O
μA
(1) Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not
tested in production.
(2)Data based on characterisation results, not tested in production.
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