STM8S003K3 STM8S003F3
Pinout and pin description
Input
Output
Alternate
Default
Main
function
Pin
Pin
function
Type
alternate
(after reset) function
no.
after remap
Ext.
High
name
floating wpu
Speed OD PP
(1)
[option bit]
interrupt sink
28
29
PD3/
TIM2_CH2/
ADC_ETR
I/O
I/O
X
X
X
X
X
X
HS
HS
O3
O3
X
X
X
X
Port D3
Port D4
Timer 2 -
channel 2/ADC
external trigger
PD4/BEEP/
TIM2_CH1
Timer 2 -
channel
1/BEEP output
30
31
32
PD5/
UART1_TX
I/O
I/O
I/O
X
X
X
X
X
X
X
X
X
HS
HS
HS
O3
O3
O3
X
X
X
X
X
X
Port D5
Port D6
Port D7
UART1 data
transmit
PD6/
UART1_RX
UART1 data
receive
PD7/ TLI
[TIM1_CH4]
Top level
interrupt
Timer 1 -
channel 4
[AFR6]
(1)
I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the total
driven current must respect the absolute maximum ratings (see Electrical characteristics).
(2)
When the MCU is in Halt/Active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for waking
up the device. In this mode, the output state of PA1 is not driven. It is recommended to use PA1 only in input mode if Halt/Active-halt
is used in the application.
(3)
In the open-drain output column, "T" defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to V
implemented).
are not
DD
(4)
The PD1 pin is in input pull-up during the reset phase and after internal reset release.
5.2
STM8S003F3 TSSOP20/UFQFPN20 pinout and pin description
5.2.1
STM8S003F3 TSSOP20 pinout and pin description
Figure 4: STM8S003F3 TSSOP20 pinout
1
20
19
18
17
16
15
14
13
12
11
UART1_CK/TIM2_CH1/BEEP/(HS)PD4
UART1_TX/AIN5/(HS) PD5
PD3 (HS)/AIN4/TIM2_CH2/ADC_ETR
PD2 (HS)/AIN3/[TIM2_CH3]
2
UART1_RX/AIN6/(HS) PD6
NRST
3
PD1(HS)/SWIM
4
PC7 (HS)/SPI_MISO [TIM1_CH2]
PC6 (HS)/SPI_MOSI [TIM1_CH1]
PC5 (HS)/SPI_SCK [TIM2_CH1]
PC4 (HS)/TIM1_CH4/CLK_CCO/AIN2/[TIM1_CH2N]
PC3 (HS)/TIM1_CH3 [TLI] [TIM1_CH1N]
OSCIN/PA1
5
OSCOUT/PA2
6
7
V
SS
8
VCAP
2
V
9
10
DD
PB4 (T)/I C_SCL [ADC_ETR]
2
[SPI_NSS] TIM2_CH3/(HS) PA3
PB5 (T)/I C_SDA [TIM1_BKIN]
1. HS high sink capability.
DocID018576 Rev 2
21/99
STMICROELECTRONICS [ ST ]
