STM32F103xC, STM32F103xD, STM32F103xE
Table 5.
LFBGA144
LFBGA100
Pinouts and pin descriptions
High-density STM32F103xx pin definitions (continued)
I / O Level
(2)
Pins
WLCSP64
LQFP100
LQFP144
LQFP64
Pin name
Type
(1)
Alternate functions
(4)
Main
function
(3)
(after reset)
Default
Remap
K1 H1
L1
J1
-
F7
(7)
-
-
20 31
21 32
V
REF-
V
REF+
V
DDA
S
S
S
V
REF-
V
REF+
V
DDA
WKUP/USART2_CTS
(8)
ADC123_IN0
TIM2_CH1_ETR
TIM5_CH1/TIM8_ETR
USART2_RTS
(8)
ADC123_IN1/
TIM5_CH2/TIM2_CH2
(8)
USART2_TX
(8)
/TIM5_CH3
ADC123_IN2/
TIM2_CH3
(8)
USART2_RX
(8)
/TIM5_CH4
ADC123_IN3/TIM2_CH4
(8)
M1 K1 G8 13 22 33
J2
G2 F6 14 23 34
PA0-WKUP
I/O
PA0
K2 H2 E6 15 24 35
PA1
I/O
PA1
L2
J2 H8 16 25 36
PA2
I/O
PA2
M2 K2 G7 17 26 37
G4 E4 F5 18 27 38
F4
J3
F4 G6 19 28 39
G3 H7 20 29 40
PA3
V
SS_4
V
DD_4
PA4
I/O
S
S
I/O
PA3
V
SS_4
V
DD_4
PA4
SPI1_NSS
(8)
/
USART2_CK
(8)
DAC_OUT1/ADC12_IN4
SPI1_SCK
(8)
DAC_OUT2 ADC12_IN5
SPI1_MISO
(8)
TIM8_BKIN/ADC12_IN6
TIM3_CH1
(8)
SPI1_MOSI
(8)
/
TIM8_CH1N/ADC12_IN7
TIM3_CH2
(8)
ADC12_IN14
ADC12_IN15
ADC12_IN8/TIM3_CH3
TIM8_CH2N
ADC12_IN9/TIM3_CH4
(8)
TIM8_CH3N
TIM1_CH2N
TIM1_CH3N
TIM1_BKIN
K3 H3 E5 21 30 41
PA5
I/O
PA5
L3
J3 G5 22 31 42
PA6
I/O
PA6
M3 K3 G4 23 32 43
J4
G4 H6 24 33 44
PA7
PC4
PC5
PB0
PB1
PB2
PF11
PF12
I/O
I/O
I/O
I/O
I/O
PA7
PC4
PC5
PB0
PB1
TIM1_CH1N
K4 H4 H5 25 34 45
L4
J4 H4 26 35 46
M4 K4 F4 27 36 47
J5
M5
L5
G5 H3 28 37 48
-
-
-
-
-
-
-
-
49
50
I/O FT PB2/BOOT1
I/O FT
I/O FT
PF11
PF12
FSMC_NIOS16
FSMC_A6
Doc ID 14611 Rev 7
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