STM32F103x8, STM32F103xB
Electrical characteristics
5.3.12
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
are derived from tests
performed under the conditions summarized in
All I/Os are CMOS and TTL
compliant.
Table 34.
Symbol
V
IL
V
IH
V
IL
V
IH
I/O static characteristics
Parameter
Input low level voltage
Standard IO input high level
voltage
IO FT
(1)
input high level voltage
Input low level voltage
CMOS ports
Input high level voltage
Standard IO Schmitt trigger
voltage hysteresis
(2)
0.65 V
DD
200
5% V
DD(3)
V
SS
V
IN
V
DD
Standard I/Os
V
IN
= 5 V
I/O FT
Weak pull-up equivalent
resistor
(5)
Weak pull-down equivalent
resistor
I/O pin capacitance
V
IN
�½
V
SS
V
IN
�½
V
DD
30
30
40
40
5
1
µA
3
50
50
k
k
pF
TTL ports
Conditions
Min
–0.5
2
2
–0.5
Typ
Max
0.8
V
V
DD
+0.5
5.5V
0.35 V
DD
V
DD
+0.5
mV
mV
V
Unit
V
hys
IO FT Schmitt trigger voltage
hysteresis
(2)
I
lkg
Input leakage current
(4)
R
PU
R
PD
C
IO
1. FT = Five-volt tolerant.
2. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in
production.
3. With a minimum of 100 mV.
4. Leakage could be higher than max. if negative current is injected on adjacent pins.
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution
to the series resistance is minimum
(~10% order)
.
All I/Os are CMOS and TTL compliant (no software configuration required), their
characteristics consider the most strict CMOS-technology or TTL parameters:
●
For V
IH
:
–
–
if V
DD
is in the [2.00 V - 3.08 V] range: CMOS characteristics but TTL included
if V
DD
is in the [3.08 V - 3.60 V] range: TTL characteristics but CMOS included
if V
DD
is in the [2.00 V - 2.28 V] range: TTL characteristics but CMOS included
if V
DD
is in the [2.28 V - 3.60 V] range: CMOS characteristics but TTL included
●
For V
IL
:
–
–
Doc ID 13587 Rev 11
57/92