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STM32F103C8T7XXX 参数 Datasheet PDF下载

STM32F103C8T7XXX图片预览
型号: STM32F103C8T7XXX
PDF下载: 下载PDF文件 查看货源
内容描述: 中密度高性能线的基于ARM的32位MCU,具有64或128 KB的闪存, USB , CAN ,7个定时器, 2的ADC ,9个通信接口 [Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 92 页 / 1212 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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Electrical characteristics
STM32F103x8, STM32F103xB
5.3.4
Embedded reference voltage
The parameters given in
are derived from tests performed under ambient
temperature and V
DD
supply voltage conditions summarized in
Table 12.
Symbol
V
REFINT
Embedded internal reference voltage
Parameter
Internal reference voltage
ADC sampling time when
reading the internal reference
voltage
Internal reference voltage
spread over the temperature
range
Temperature coefficient
V
DD
= 3 V ±10 mV
Conditions
–40 °C < T
A
< +105 °C
–40 °C < T
A
< +85 °C
Min
1.16
1.16
Typ
1.20
1.20
5.1
Max
1.26
1.24
17.1
(2)
Unit
V
V
µs
T
S_vrefint
(1)
V
RERINT(2)
T
Coeff(2)
10
100
mV
ppm/°C
1. Shortest sampling time can be determined in the application by multiple iterations.
2. Guaranteed by design, not tested in production.
5.3.5
Supply current characteristics
The current consumption is a function of several parameters and factors such as the
operating voltage, ambient temperature, I/O pin loading, device software configuration,
operating frequencies, I/O pin switching rate, program location in memory and executed
binary code.
The current consumption is measured as described in
All Run-mode current consumption measurements given in this section are performed with a
reduced code that gives a consumption equivalent to Dhrystone 2.1 code.
Maximum current consumption
The MCU is placed under the following conditions:
All I/O pins are in input mode with a static value at V
DD
or V
SS
(no load)
All peripherals are disabled except when explicitly mentioned
The Flash memory access time is adjusted to the f
HCLK
frequency (0 wait state from 0
to 24 MHz, 1 wait state from 24 to 48 MHz and 2 wait states above)
Prefetch in ON (reminder: this bit must be set before clock setting and bus prescaling)
When the peripherals are enabled f
PCLK1
= f
HCLK
/2, f
PCLK2
= f
HCLK
The parameters given in
and
are derived from tests performed
under ambient temperature and V
DD
supply voltage conditions summarized in
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Doc ID 13587 Rev 11