欢迎访问ic37.com |
会员登录 免费注册
发布采购

STM32F103RCT7TR 参数 Datasheet PDF下载

STM32F103RCT7TR图片预览
型号: STM32F103RCT7TR
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度高性能线的基于ARM的32位MCU,具有256至512KB闪存, USB , CAN ,11个定时器, 3的ADC ,13个通信接口 [High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 123 页 / 1691 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号STM32F103RCT7TR的Datasheet PDF文件第27页浏览型号STM32F103RCT7TR的Datasheet PDF文件第28页浏览型号STM32F103RCT7TR的Datasheet PDF文件第29页浏览型号STM32F103RCT7TR的Datasheet PDF文件第30页浏览型号STM32F103RCT7TR的Datasheet PDF文件第32页浏览型号STM32F103RCT7TR的Datasheet PDF文件第33页浏览型号STM32F103RCT7TR的Datasheet PDF文件第34页浏览型号STM32F103RCT7TR的Datasheet PDF文件第35页  
STM32F103xC, STM32F103xD, STM32F103xE  
Pinouts and pin descriptions  
Alternate functions(4)  
Table 5.  
High-density STM32F103xx pin definitions (continued)  
Pins  
Main  
Pin name  
function(3)  
(after reset)  
Default  
Remap  
K1 H1  
L1 J1  
-
-
-
20 31  
21 32  
VREF-  
VREF+  
VDDA  
S
S
S
VREF-  
VREF+  
VDDA  
F7  
(7)  
M1 K1 G8 13 22 33  
J2 G2 F6 14 23 34  
WKUP/USART2_CTS(8)  
ADC123_IN0  
TIM2_CH1_ETR  
TIM5_CH1/TIM8_ETR  
PA0-WKUP  
PA1  
I/O  
I/O  
PA0  
PA1  
USART2_RTS(8)  
ADC123_IN1/  
K2 H2 E6 15 24 35  
TIM5_CH2/TIM2_CH2(8)  
USART2_TX(8)/TIM5_CH3  
ADC123_IN2/  
L2 J2 H8 16 25 36  
M2 K2 G7 17 26 37  
PA2  
PA3  
I/O  
I/O  
PA2  
PA3  
TIM2_CH3 (8)  
USART2_RX(8)/TIM5_CH4  
ADC123_IN3/TIM2_CH4(8)  
G4 E4 F5 18 27 38  
F4 F4 G6 19 28 39  
VSS_4  
VDD_4  
S
S
VSS_4  
VDD_4  
SPI1_NSS(8)  
/
J3 G3 H7 20 29 40  
K3 H3 E5 21 30 41  
L3 J3 G5 22 31 42  
PA4  
PA5  
PA6  
I/O  
I/O  
I/O  
PA4  
PA5  
PA6  
USART2_CK(8)  
DAC_OUT1/ADC12_IN4  
SPI1_SCK(8)  
DAC_OUT2 ADC12_IN5  
SPI1_MISO(8)  
TIM8_BKIN/ADC12_IN6  
TIM3_CH1(8)  
TIM1_BKIN  
TIM1_CH1N  
SPI1_MOSI(8)  
/
M3 K3 G4 23 32 43  
PA7  
I/O  
PA7  
TIM8_CH1N/ADC12_IN7  
TIM3_CH2(8)  
J4 G4 H6 24 33 44  
K4 H4 H5 25 34 45  
PC4  
PC5  
I/O  
I/O  
PC4  
PC5  
ADC12_IN14  
ADC12_IN15  
ADC12_IN8/TIM3_CH3  
TIM8_CH2N  
L4 J4 H4 26 35 46  
PB0  
PB1  
I/O  
I/O  
PB0  
PB1  
TIM1_CH2N  
TIM1_CH3N  
ADC12_IN9/TIM3_CH4(8)  
TIM8_CH3N  
M4 K4 F4 27 36 47  
J5 G5 H3 28 37 48  
PB2  
PF11  
PF12  
I/O FT PB2/BOOT1  
M5  
L5  
-
-
-
-
-
-
-
-
49  
50  
I/O FT  
I/O FT  
PF11  
PF12  
FSMC_NIOS16  
FSMC_A6  
Doc ID 14611 Rev 7  
31/123