Electrical characteristics
Figure 23. Recommended NRST pin
protection
STM32F103x4, STM32F103x6
External
reset circuit
(1)
NRST
(2)
VDD
RPU
Filter
Internal Reset
0.1
µF
STM32F10xxx
ai14132c
2. The reset network protects the device against parasitic resets.
3. The user must ensure that the level on the NRST pin can go below the V
IL(NRST)
max level specified in
5.3.14
TIM timer characteristics
The parameters given in
Table 38
are guaranteed by design.
Refer to
Section 5.3.12: I/O port characteristics
for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
Table 38.
Symbol
t
res(TIM)
TIMx
(1)
characteristics
Parameter
Timer resolution time
f
TIMxCLK
= 72 MHz
Timer external clock
frequency on CH1 to CH4 f
TIMxCLK
= 72 MHz
Timer resolution
16-bit counter clock period
1
when internal clock is
f
TIMxCLK
= 72 MHz 0.0139
selected
13.9
0
0
f
TIMxCLK
/2
36
16
65536
910
65536 × 65536
Conditions
Min
1
Max
Unit
t
TIMxCLK
ns
MHz
MHz
bit
t
TIMxCLK
µs
t
TIMxCLK
s
f
EXT
Res
TIM
t
COUNTER
t
MAX_COUNT
Maximum possible count
f
TIMxCLK
= 72 MHz
59.6
1. TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers.
56/80
Doc ID 15060 Rev 3
STMICROELECTRONICS [ STMICROELECTRONICS ]
