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STM32F100C8T6BTR 参数 Datasheet PDF下载

STM32F100C8T6BTR图片预览
型号: STM32F100C8T6BTR
PDF下载: 下载PDF文件 查看货源
内容描述: 低和中等密度值线,先进的基于ARM的32位MCU低和中等密度值线,先进的基于ARM的32位MCU [Low & medium-density value line, advanced ARM-based 32-bit MCU Low & medium-density value line, advanced ARM-based 32-bit MCU]
分类和应用:
文件页数/大小: 84 页 / 1148 K
品牌: STMICROELECTRONICS [ ST ]
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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB  
Description  
pulse mode output. This gives up to 12 input captures/output compares/PWMs on the  
largest packages.  
The TIM2, TIM3, TIM4 general-purpose timers can work together or with the TIM1  
advanced-control timer via the Timer Link feature for synchronization or event chaining.  
TIM2, TIM3, TIM4 all have independent DMA request generation.  
These timers are capable of handling quadrature (incremental) encoder signals and the  
digital outputs from 1 to 3 hall-effect sensors.  
Their counters can be frozen in debug mode.  
TIM15, TIM16 and TIM17  
These timers are based on a 16-bit auto-reload upcounter and a 16-bit prescaler.  
TIM15 has two independent channels, whereas TIM16 and TIM17 feature one single  
channel for input capture/output compare, PWM or one-pulse mode output.  
The TIM15, TIM16 and TIM17 timers can work together, and TIM15 can also operate with  
TIM1 via the Timer Link feature for synchronization or event chaining.  
TIM15 can be synchronized with TIM16 and TIM17.  
TIM15, TIM16, and TIM17 have a complementary output with dead-time generation and  
independent DMA request generation  
Their counters can be frozen in debug mode.  
2.16.3  
2.16.4  
Basic timers TIM6 and TIM7  
These timers are mainly used for DAC trigger generation. They can also be used as a  
generic 16-bit time base.  
Independent watchdog  
The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is  
clocked from an independent 40 kHz internal RC and as it operates independently from the  
main clock, it can operate in Stop and Standby modes. It can be used as a watchdog to  
reset the device when a problem occurs, or as a free running timer for application timeout  
management. It is hardware or software configurable through the option bytes. The counter  
can be frozen in debug mode.  
2.16.5  
Window watchdog  
The window watchdog is based on a 7-bit downcounter that can be set as free running. It  
can be used as a watchdog to reset the device when a problem occurs. It is clocked from the  
main clock. It has an early warning interrupt capability and the counter can be frozen in  
debug mode.  
Doc ID 16455 Rev 2  
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