Pinouts and pin description
STM32F405xx, STM32F407xx
Table 7. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
Alternate functions
Additional functions
(function after
reset)(1)
-
-
E8
F7
-
-
130 D7 158
VSS
VDD
S
S
131 C7 159
132 B7 160
USART6_CTS /
DCMI_D13/ EVENTOUT
-
-
-
PG15
I/O FT
JTDO/ TRACESWO/
SPI3_SCK / I2S3_CK /
TIM2_CH2 / SPI1_SCK/
EVENTOUT
PB3
55 B6 89 133 A10 161
56 A6 90 134 A9 162
I/O FT
(JTDO/
TRACESWO)
NJTRST/ SPI3_MISO /
TIM3_CH1 / SPI1_MISO /
I2S3ext_SD/ EVENTOUT
PB4
I/O FT
I/O FT
(NJTRST)
I2C1_SMBA/ CAN2_RX /
OTG_HS_ULPI_D7 /
ETH_PPS_OUT/TIM3_CH
2 / SPI1_MOSI/
SPI3_MOSI / DCMI_D10 /
I2S3_SD/ EVENTOUT
57 D7 91 135 A6 163
PB5
PB6
I2C1_SCL/ TIM4_CH1 /
CAN2_TX /
DCMI_D5/USART1_TX/
EVENTOUT
58 C7 92 136 B6 164
I/O FT
I/O FT
I2C1_SDA / FSMC_NL /
DCMI_VSYNC /
USART1_RX/ TIM4_CH2/
EVENTOUT
59 B7 93 137 B5 165
60 A7 94 138 D6 166
PB7
BOOT0
I
B
VPP
TIM4_CH3/SDIO_D4/
TIM10_CH1 / DCMI_D6 /
ETH_MII_TXD3 /
I2C1_SCL/ CAN1_RX/
EVENTOUT
61 D8 95 139 A5 167
PB8
PB9
I/O FT
I/O FT
SPI2_NSS/ I2S2_WS /
TIM4_CH4/ TIM11_CH1/
SDIO_D5 / DCMI_D7 /
I2C1_SDA / CAN1_TX/
EVENTOUT
62 C8 96 140 B4 168
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