STM32F405xx, STM32F407xx
Pinouts and pin description
Table 7. STM32F40x pin and ball definitions (continued)
Pin number
Pin name
Alternate functions
Additional functions
(function after
reset)(1)
FSMC_CLK/
USART2_CTS/
EVENTOUT
-
-
84 117 D11 145
PD3
I/O FT
FSMC_NOE/
USART2_RTS/
EVENTOUT
-
-
A4 85 118 D10 146
C6 86 119 C11 147
PD4
PD5
I/O FT
I/O FT
FSMC_NWE/USART2_TX
/ EVENTOUT
-
-
-
-
-
-
120 D8 148
121 C8 149
VSS
VDD
S
S
FSMC_NWAIT/
USART2_RX/ EVENTOUT
-
-
B5 87 122 B11 150
A5 88 123 A11 151
PD6
PD7
I/O FT
I/O FT
USART2_CK/FSMC_NE1/
FSMC_NCE2/
EVENTOUT
USART6_RX /
FSMC_NE2/FSMC_NCE3
/ EVENTOUT
-
-
-
-
-
-
124 C10 152
125 B10 153
PG9
I/O FT
I/O FT
FSMC_NCE4_1/
FSMC_NE3/ EVENTOUT
PG10
FSMC_NCE4_2 /
ETH_MII_TX_EN/
ETH _RMII_TX_EN/
EVENTOUT
-
-
-
-
-
-
126 B9 154
127 B8 155
PG11
PG12
I/O FT
I/O FT
FSMC_NE4 /
USART6_RTS/
EVENTOUT
FSMC_A24 /
USART6_CTS
/ETH_MII_TXD0/
ETH_RMII_TXD0/
EVENTOUT
-
-
-
-
-
-
128 A8 156
129 A7 157
PG13
PG14
I/O FT
I/O FT
FSMC_A25 / USART6_TX
/ETH_MII_TXD1/
ETH_RMII_TXD1/
EVENTOUT
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