Pinouts and pin description
STM32F105xx, STM32F107xx
Table 5.
Pins
Pin definitions (continued)
Alternate functions(4)
Main
Pin name
function(3)
(after reset)
Default
Remap
PB3 / TRACESWO/
TIM2_CH2 / SPI1_SCK
A7 55 89
A6 56 90
PB3
PB4
I/O FT
I/O FT
JTDO
SPI3_SCK / I2S3_CK
SPI3_MISO
PB4 / TIM3_CH1/
SPI1_MISO
NJTRST
I2C1_SMBA / SPI3_MOSI /
ETH_MII_PPS_OUT / I2S3_SD
ETH_RMII_PPS_OUT
TIM3_CH2/SPI1_MOSI/
CAN2_RX
C5 57 91
PB5
I/O
PB5
B5 58 92
A5 59 93
D5 60 94
B4 61 95
A4 62 96
PB6
PB7
I/O FT
I/O FT
I
PB6
PB7
I2C1_SCL(7)/TIM4_CH1(7)
I2C1_SDA(7)/TIM4_CH2(7)
USART1_TX/CAN2_TX
USART1_RX
BOOT0
PB8
BOOT0
PB8
I/O FT
I/O FT
I/O FT
I/O FT
S
TIM4_CH3(7)/ ETH_MII_TXD3
TIM4_CH4(7)
I2C1_SCL/CAN1_RX
I2C1_SDA / CAN1_TX
PB9
PB9
D4
C4
-
-
97
98
PE0
PE0
TIM4_ETR
PE1
PE1
E5 63 99
F5 64 100
VSS_3
VDD_3
VSS_3
VDD_3
S
1. I = input, O = output, S = supply, HiZ = high impedance.
2. FT = 5 V tolerant. All I/Os are VDD capable.
3. Function availability depends on the chosen device.
4. If several peripherals share the same I/O pin, to avoid conflict between these alternate functions only one peripheral should
be enabled at a time through the peripheral clock enable bit (in the corresponding RCC peripheral clock enable register).
5. PC13, PC14 and PC15 are supplied through the power switch, and so their use in output mode is limited: they can be used
only in output 2 MHz mode with a maximum load of 30 pF and only one pin can be put in output mode at a time.
6. Main function after the first backup domain power-up. Later on, it depends on the contents of the Backup registers even
after reset (because these registers are not reset by the main reset). For details on how to manage these IOs, refer to the
Battery backup domain and BKP register description sections in the STM32F10xxx reference manual, available from the
STMicroelectronics website: www.st.com.
7. This alternate function can be remapped by software to some other port pins (if available on the used package). For more
details, refer to the Alternate function I/O and debug configuration section in the STM32F10xxx reference manual,
available from the STMicroelectronics website: www.st.com.
8. SPI2/I2S2 and I2C2 are not available when the Ethernet is being used.
9. For the LQFP64 package, the pins number 5 and 6 are configured as OSC_IN/OSC_OUT after reset, however the
functionality of PD0 and PD1 can be remapped by software on these pins. For the LQFP100 and BGA100 packages, PD0
and PD1 are available by default, so there is no need for remapping. For more details, refer to Alternate function I/O and
debug configuration section in the STM32F10xxx reference manual.
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Doc ID 15274 Rev 6
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