STM32F105xx, STM32F107xx
Pinouts and pin description
Table 5.
Pins
Pin definitions (continued)
Alternate functions(4)
Main
Pin name
function(3)
(after reset)
Default
Remap
USART2_TX(7)
/
TIM5_CH3/ADC12_IN2/
TIM2_CH3 (7)/ ETH_MII_MDIO/
ETH_RMII_MDIO
J2 16 25
K2 17 26
PA2
PA3
I/O
I/O
PA2
PA3
USART2_RX(7)
/
TIM5_CH4/ADC12_IN3 /
TIM2_CH4(7)/ ETH_MII_COL
E4 18 27
F4 19 28
VSS_4
VDD_4
S
S
VSS_4
VDD_4
SPI1_NSS(7)/DAC_OUT1 /
USART2_CK(7) / ADC12_IN4
G3 20 29
H3 21 30
J3 22 31
PA4
PA5
PA6
I/O
I/O
I/O
PA4
PA5
PA6
SPI3_NSS/I2S3_WS
SPI1_SCK(7)
/
DAC_OUT2 / ADC12_IN5
SPI1_MISO(7)/ADC12_IN6 /
TIM3_CH1(7)
TIM1_BKIN
TIM1_CH1N
SPI1_MOSI(7)/ADC12_IN7 /
TIM3_CH2(7)
/
K3 23 32
G4 24 33
PA7
I/O
PA7
ETH_MII_RX_DV(8)
/
ETH_RMII_CRS_DV
ADC12_IN14/
PC4
PC5
I/O
I/O
PC4
PC5
ETH_MII_RXD0(8)
/
ETH_RMII_RXD0
ADC12_IN15/
H4 25 34
J4 26 35
ETH_MII_RXD1(8)
ETH_RMII_RXD1
/
ADC12_IN8/TIM3_CH3/
ETH_MII_RXD2(8)
PB0
PB1
I/O
I/O
PB0
PB1
TIM1_CH2N
TIM1_CH3N
ADC12_IN9/TIM3_CH4(7)
ETH_MII_RXD3(8)
/
K4 27 36
G5 28 37
PB2
PE7
I/O FT PB2/BOOT1
H5
J5
K5
-
-
-
-
-
-
-
-
-
38
39
40
-
I/O FT
I/O FT
I/O FT
S
PE7
PE8
PE9
TIM1_ETR
TIM1_CH1N
TIM1_CH1
PE8
PE9
VSS_7
VDD_7
PE10
PE11
PE12
-
-
S
G6
H6
J6
41
42
43
I/O FT
I/O FT
I/O FT
PE10
PE11
PE12
TIM1_CH2N
TIM1_CH2
TIM1_CH3N
Doc ID 15274 Rev 6
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