STM32F103xC, STM32F103xD, STM32F103xE
Description
2.1
Device overview
The STM32F103xx high-density performance line family offers devices in six different
package types: from 64 pins to 144 pins. Depending on the device chosen, different sets of
peripherals are included, the description below gives an overview of the complete range of
peripherals proposed in this family.
Figure 1 shows the general block diagram of the device family.
Table 2.
STM32F103xC, STM32F103xD and STM32F103xE features and peripheral
counts
Peripherals
STM32F103Rx
256 384
48
64(1)
STM32F103Vx
256 384 512
48
STM32F103Zx
Flash memory in Kbytes
SRAM in Kbytes
FSMC
512
256
48
384
Yes
512
64
64
No
Yes(2)
General-purpose
Timers Advanced-control
Basic
4
2
2
SPI(I2S)(3)
3(2)
I2C
2
5
1
1
1
USART
Comm
USB
CAN
SDIO
GPIOs
51
80
112
12-bit ADC
3
3
3
Number of channels
16
16
21
12-bit DAC
Number of channels
2
2
CPU frequency
72 MHz
2.0 to 3.6 V
Operating voltage
Ambient temperatures: –40 to +85 °C /–40 to +105 °C (see Table 10)
Junction temperature: –40 to + 125 °C (see Table 10)
Operating temperatures
Package
LQFP64, WLCSP64
LQFP100, BGA100 LQFP144, BGA144
1. 64 KB RAM for 256 KB Flash are available on devices delivered in CSP packages only.
2. For the LQFP100 and BGA100 packages, only FSMC Bank1 and Bank2 are available. Bank1 can only
support a multiplexed NOR/PSRAM memory using the NE1 Chip Select. Bank2 can only support a 16- or
8-bit NAND Flash memory using the NCE2 Chip Select. The interrupt line cannot be used since Port G is
not available in this package.
3. The SPI2 and SPI3 interfaces give the flexibility to work in an exclusive way in either the SPI mode or the
I2S audio mode.
Doc ID 14611 Rev 8
11/130
STMICROELECTRONICS [ ST ]
