Electrical characteristics
STM32F103xC, STM32F103xD, STM32F103xE
Figure 41. NAND controller waveforms for common memory write access
FSMC_NCEx
Low
ALE (FSMC_A17)
CLE (FSMC_A16)
td(ALE-NWE)
tw(NWE)
th(NWE-ALE)
FSMC_NWE
FSMC_NOE
td(D-NWE)
tv(NWE-D)
th(NWE-D)
FSMC_D[15:0]
ai14913b
(1)
Table 40. Switching characteristics for NAND Flash read and write cycles
Symbol
Parameter
Min
Max
Unit
(2)
td(D-NWE)
FSMC_D[15:0] valid before FSMC_NWE high
FSMC_NOE low width
5tHCLK + 12
ns
(2)
tw(NOE)
4tHCLK – 1.5 4tHCLK + 1.5 ns
FSMC_D[15:0] valid data before FSMC_NOE
high
(2)
(2)
tsu(D-NOE)
25
ns
th(NOE-D)
FSMC_D[15:0] valid data after FSMC_NOE high 7
ns
(2)
tw(NWE)
FSMC_NWE low width
4tHCLK – 1
4tHCLK + 2.5 ns
(2)
tv(NWE-D)
FSMC_NWE low to FSMC_D[15:0] valid
FSMC_NWE high to FSMC_D[15:0] invalid
FSMC_ALE valid before FSMC_NWE low
FSMC_NWE high to FSMC_ALE invalid
FSMC_ALE valid before FSMC_NOE low
FSMC_NWE high to FSMC_ALE invalid
0
ns
ns
(2)
th(NWE-D)
td(ALE-NWE)
th(NWE-ALE)
2tHCLK + 4ns
3tHCLK + 4.5
3tHCLK + 4.5
(3)
(3)
3tHCLK + 1.5 ns
ns
(3)
td(ALE-NOE)
th(NOE-ALE)
3tHCLK + 2
ns
ns
(3)
1. CL = 15 pF.
2. Based on characterization, not tested in production.
3. Guaranteed by design, not tested in production.
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Doc ID 14611 Rev 8
STMICROELECTRONICS [ ST ]
