Electrical characteristics
Figure 9.
STM32F103x4, STM32F103x6
Pin loading conditions
Figure 10. Pin input voltage
STM32F103xx pin
STM32F103xx pin
C = 50 pF
V
IN
ai14141
ai14142
5.1.6
Power supply scheme
Figure 11. Power supply scheme
V
BAT
Backup circuitry
(OSC32K,RTC,
Wakeup logic
Power switch
1.8-3.6V
Backup registers)
OUT
IN
IO
Logic
GP I/Os
Kernel logic
(CPU,
Digital
& Memories)
V
DD
V
DD
1/2/3/4/5
Regulator
5 × 100 nF
+ 1 × 4.7 µF
V
SS
1/2/3/4/5
V
DD
V
DDA
V
REF+
V
REF
Analog:
RCs, PLL,
...
10 nF
+ 1 µF
ADC
10 nF
+ 1 µF
V
REF-
V
SSA
ai15496
Caution:
In Figure 11, the 4.7 µF capacitor must be connected to V
.
DD3
30/87
Doc ID 15060 Rev 5
STMICROELECTRONICS [ ST ]
