STM32F103xx
Figure 21. SPI timing diagram - master mode
High
NSS input
tc(SCK)
SCK Input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
Electrical characteristics
SCK Input
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tsu(MI)
MISO
INP UT
MOSI
OUTUT
tw(SCKH)
tw(SCKL)
MS BIN
th(MI)
M SB OUT
tv(MO)
B I T1 OUT
th(MO)
ai14136
tr(SCK)
tf(SCK)
BI T6 IN
LSB IN
LSB OUT
1. Measurement points are done at CMOS levels: 0.3V
DD
and 0.7V
DD
.
USB characteristics
The USB interface is USB-IF certified (Full Speed).
Table 37.
Symbol
Input levels
V
DI
V
CM
V
SE
Differential input sensitivity
Differential common mode
range
Single ended receiver
threshold
I(USBDP, USBDM)
Includes V
DI
range
0.2
0.8
1.3
2.5
2.0
V
USB DC electrical characteristics
Parameter
Conditions
Min.
(1)
Max.
(1)
Unit
Output levels
V
OL
V
OH
Static output level low
Static output level high
R
L
of 1.5 k
Ω
to 3.6 V
(2)
R
L
of 15 k
Ω
to V
SS(2)
2.8
0.3
V
3.6
1. All the voltages are measured from the local ground potential.
2. R
L
is the load connected on the USB drivers
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