STM32F103xx
Electrical characteristics
5.3.12
I/O port pin characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 29 are derived from tests
performed under ambient temperature and V supply voltage conditions summarized in
DD
Table 7.
All unused pins must be held at a fixed voltage, by using the I/O output mode, an external
pull-up or pull-down resistor (see Figure 15).
(1)
Table 29. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage(2)
–0.5
0.8
V
IO TC input high level
voltage(2)
TTL ports
2
VDD+0.5
VIH
IO FT high level voltage(2)
Input low level voltage(2)
Input high level voltage(2)
2
5.5V
VIL
–0.5
0.35 VDD
VDD+0.5
CMOS ports
V
VIH
0.65 VDD
IO TC Schmitt trigger voltage
hysteresis(3)
200
mV
mV
Vhys
IO TC Schmitt trigger voltage
hysteresis(3)
(4)
5% VDD
VSS ≤VIN ≤VDD
Standard I/Os
±1
3
Ilkg
Input leakage current (5)
µA
VIN= 5 V
5 V tolerant I/Os
Weak pull-up equivalent
resistor(6)
RPU
VIN = VSS
VIN = VDD
30
30
40
50
50
kΩ
Weak pull-down equivalent
resistor(6)
RPD
CIO
40
5
kΩ
I/O pin capacitance
pF
1. VDD = 3.3 V, TA = −40 to 105 °C unless otherwise specified.
2. Values based on characterization results, and not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. With a minimum of 100 mV.
5. Leakage could be higher than max. if negative current is injected on adjacent pins.
6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order).
43/67
STMICROELECTRONICS [ ST ]
