STA326
8.11 Variable Max Power Correction (Address 27h-28h):
MPCC bits determine the 16 MSBs of the MPC compensation coefficient. This coefficient is used in place
of the default coefficient when MPCV = 1.
Table 35.
D7
MPCC15
0
D6
MPCC14
0
D5
MPCC13
1
D4
MPCC12
0
D3
MPCC11
1
D2
MPCC10
1
D1
MPCC9
0
D0
MPCC8
1
MPCC7
1
MPCC6
1
MPCC5
0
MPCC4
0
MPCC3
0
MPCC2
0
MPCC1
0
MPCC0
0
8.12 Fault Detect Recovery (Address 2Bh-2Ch):
FDRC bits specify the 16-bit Fault Detect Recovery time delay. When FAULT is asserted, the TRISTATE
output will be immediately asserted low and held low for the time period specified by this constant. A con-
stant value of 0001h in this register is ~.083ms. The default value of 000C specifies ~.1mSec.
Table 36.
D7
FRDC15
0
D6
FDRC14
0
D5
FDRC13
0
D4
FDRC12
0
D3
FDRC11
0
D2
FDRC10
0
D1
FDRC9
0
D0
FDRC8
0
D7
FDRC7
0
D6
FDRC6
0
D5
FDRC5
0
D4
FDRC4
0
D3
FDRC3
1
D2
FDRC2
1
D1
FDRC1
0
D0
FDRC0
0
Figure 15.
OUTY
Vcc
(3/4)Vcc
Low current dead time = MAX(DTr,DTf)
(1/2)Vcc
(1/4)Vcc
+Vcc
t
DTr
DTf
Duty cycle = 50%
M58
M57
OUTY
R 8Ω
INY
+
-
V67 =
vdc = Vcc/2
gnd
D02AU1448
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