STA326
8.10 Writing a set of coefficients to RAM
■ write 8-bits of starting address to I2C register 16h
■ write top 8-bits of coefficient b1 in I2C address 17h
■ write middle 8-bits of coefficient b1 in I2C address 18h
■ write bottom 8-bits of coefficient b1 in I2C address 19h
■ write top 8-bits of coefficient b2 in I2C address 1Ah
■ write middle 8-bits of coefficient b2 in I2C address 1Bh
■ write bottom 8-bits of coefficient b2 in I2C address 1Ch
■ write top 8-bits of coefficient a1 in I2C address 1Dh
■ write middle 8-bits of coefficient a1 in I2C address 1Eh
■ write bottom 8-bits of coefficient a1 in I2C address 1Fh
■ write top 8-bits of coefficient a2 in I2C address 20h
■ write middle 8-bits of coefficient a2 in I2C address 21h
■ write bottom 8-bits of coefficient a2 in I2C address 22h
■ write top 8-bits of coefficient b0 in I2C address 23h
■ write middle 8-bits of coefficient b0 in I2C address 24h
■ write bottom 8-bits of coefficient b0 in I2C address 25h
■ write 1 to WA bit in I2C address 26h
The mechanism for writing a set of coefficients to RAM provides a method of updating the five coefficients
corresponding to a given biquad (filter) simultaneously to avoid possible unpleasant acoustic side-effects.
When using this technique, the 8-bit address would specify the address of the biquad b1 coefficient (e.g.
0, 5, 10, 15, …, 45 decimal), and the STA326 will generate the RAM addresses as offsets from this base
value to write the complete set of coefficient data.
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