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ST92F150JDV1Q6 参数 Datasheet PDF下载

ST92F150JDV1Q6图片预览
型号: ST92F150JDV1Q6
PDF下载: 下载PDF文件 查看货源
内容描述: 8月16日- BIT单电压闪存单片机系列内存, E3 TMEMULATED EEPROM , CAN 2.0B和J1850 BLPD [8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 426 页 / 3830 K
品牌: STMICROELECTRONICS [ ST ]
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ST92F124/F150/F250 - REGISTER AND MEMORY MAP  
4.3 ST92F124/F150/F250 REGISTER MAP  
– Registers common to other functions.  
– In particular, double-check that any registers  
with “undefined” reset values have been correct-  
ly initialized.  
Table 16 contains the map of the group F periph-  
eral pages.  
The common registers used by each peripheral  
are listed in Table 15.  
Warning: Note that in the EIVR and each IVR reg-  
ister, all bits are significant. Take care when defin-  
ing base vector addresses that entries in the Inter-  
rupt Vector table do not overlap.  
Be very careful to correctly program both:  
– The set of registers dedicated to a particular  
function or peripheral.  
Table 15. Common Registers  
Function or Peripheral  
Common Registers  
SCI, MFT  
ADC  
CICR + NICR + DMA REGISTERS + I/O PORT REGISTERS  
CICR + NICR + I/O PORT REGISTERS  
CICR + NICR + EXTERNAL INTERRUPT REGISTERS +  
I/O PORT REGISTERS  
SPI, WDT, STIM  
I/O PORTS  
EXTERNAL INTERRUPT  
RCCU  
I/O PORT REGISTERS + MODER  
INTERRUPT REGISTERS + I/O PORT REGISTERS  
INTERRUPT REGISTERS + MODER  
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