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ST10F276S-4T3 参数 Datasheet PDF下载

ST10F276S-4T3图片预览
型号: ST10F276S-4T3
PDF下载: 下载PDF文件 查看货源
内容描述: 16位MCU与MAC单元832 KB的闪存和68 KB的RAM [16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM]
分类和应用: 闪存
文件页数/大小: 235 页 / 2491 K
品牌: STMICROELECTRONICS [ ST ]
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ST10F276E  
I2C interface  
15  
I2C interface  
The integrated I2C Bus Module handles the transmission and reception of frames over the  
two-line SDA/SCL in accordance with the I2C Bus specification. The I2C Module can  
operate in slave mode, in master mode or in multi-master mode. It can receive and transmit  
data using 7-bit or 10-bit addressing. Data can be transferred at speeds up to 400 Kbit/s  
(both Standard and Fast I2C bus modes are supported).  
The module can generate three different types of interrupt:  
Requests related to bus events, like start or stop events, arbitration lost, etc.  
Requests related to data transmission  
Requests related to data reception  
These requests are issued to the interrupt controller by three different lines, and identified as  
Error, Transmit, and Receive interrupt lines.  
When the I2C module is enabled by setting bit XI2CEN in XPERCON register, pins P4.4 and  
P4.7 (where SCL and SDA are respectively mapped as alternate functions) are  
automatically configured as bidirectional open-drain: the value of the external pull-up  
resistor depends on the application. P4, DP4 and ODP4 cannot influence the pin  
configuration.  
When the I2C cell is disabled (clearing bit XI2CEN), P4.4 and P4.7 pins are standard I/ O  
controlled by P4, DP4 and ODP4.  
The speed of the I2C interface may be selected between Standard mode (0 to 100 kHz) and  
Fast I2C mode (100 to 400 kHz).  
Doc ID 12303 Rev 3  
99/235  
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