ST10F276E
Register set
Table 68. Special function registers ordered by address (continued)
8-bit
addres
s
Physical
address
Reset
value
Name
Description
XP3IC b
EXICON b
ODP2 b
PICON b
ODP3 b
ODP4 b
ODP6 b
ODP7 b
ODP8 b
EXISEL b
DPP0
F19EhE
F1C0hE
F1C2hE
F1C4hE
F1C6hE
F1CAhE
F1CEhE
F1D2hE
F1D6hE
F1DAhE
FE00h
CFh
E0h
E1h
E2h
E3h
E5h
E7h
E9h
EBh
EDh
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
18h
19h
1Ah
1Bh
20h
21h
22h
See Section 8.1
- - 00h
0000h
0000h
- - 00h
0000h
- - 00h
- - 00h
- - 00h
- - 00h
0000h
0000h
0001h
0002h
0003h
0000h
- - XXh
0000h
0000h
FC00h
FC00h
FA00h
FC00h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
External interrupt control register
Port2 open drain control register
Port input threshold control register
Port3 open drain control register
Port4 open drain control register
Port6 open drain control register
Port7 open drain control register
Port8 open drain control register
External interrupt source selection register
CPU data page pointer 0 register (10-bit)
CPU data page pointer 1 register (10-bit)
CPU data page pointer 2 register (10-bit)
CPU data page pointer 3 register (10-bit)
CPU code segment pointer register (read-only)
Emulation control register
DPP1
FE02h
DPP2
FE04h
DPP3
FE06h
CSP
FE08h
EMUCON
MDH
FE0Ah
FE0Ch
FE0Eh
FE10h
CPU multiply divide register – High word
CPU multiply divide register – Low word
CPU context pointer register
MDL
CP
SP
FE12h
CPU system stack pointer register
CPU stack overflow pointer register
CPU stack underflow pointer register
Address select register 1
STKOV
STKUN
FE14h
FE16h
ADDRSEL1 FE18h
ADDRSEL2 FE1Ah
ADDRSEL3 FE1Ch
ADDRSEL4 FE1Eh
Address select register 2
Address select register 3
Address select register 4
PW0
PW1
PW2
PW3
T2
FE30h
FE32h
FE34h
FE36h
FE40h
FE42h
FE44h
PWM module pulse width register 0
PWM module pulse width register 1
PWM module pulse width register 2
PWM module pulse width register 3
GPT1 timer 2 register
T3
GPT1 timer 3 register
T4
GPT1 timer 4 register
Doc ID 12303 Rev 3
149/235