ST10F276E
Register set
Note:
1
The system configuration is selected during reset. SYSCON reset value is 0000 0xx0 x000
0000b.
2
3
Reset Value depends on different triggered reset event.
The XPnIC Interrupt Control Registers control interrupt requests from integrated X-Bus
peripherals. Some software controlled interrupt requests may be generated by setting the
XPnIR bits (of XPnIC register) of the unused X-Peripheral nodes.
22.5
Special function registers ordered by address
Table 68 lists by order of their physical addresses all SFRs which are implemented in the
ST10F276E.
Bit-addressable SFRs are marked with the letter “b” in column “Name”.
SFRs within the Extended SFR-Space (ESFRs) are marked with the letter “E” in column
“Physical Address”.
Table 68. Special function registers ordered by address
8-bit
Physical
address
Reset
value
Name
addres
s
Description
QX0
F000hE
F002hE
F004hE
F006hE
F01ChE
F024hE
F030hE
F032hE
F034hE
F036hE
F038hE
F03AhE
F03ChE
F03EhE
F050hE
F052hE
F054hE
F056hE
F078hE
F07AhE
F07ChE
00h
01h
02h
03h
0Eh
12h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
28h
29h
2Ah
2Bh
3Ch
3Dh
3Eh
MAC unit offset register X0
0000h
0000h
0000h
0000h
800Bh
- - 05h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0040h
30D0h
QX1
MAC unit offset register X1
QR0
MAC unit offset register R0
QR1
MAC unit offset register R1
XADRS3
XPERCON
PT0
XPER address select register 3
XPER configuration register
PWM module up/down counter 0
PWM module up/down counter 1
PWM module up/down counter 2
PWM module up/down counter 3
PWM module period register 0
PWM module period register 1
PWM module period register 2
PWM module period register 3
CAPCOM timer 7 register
PT1
PT2
PT3
PP0
PP1
PP2
PP3
T7
T8
CAPCOM timer 8 register
T7REL
T8REL
IDPROG
IDMEM
IDCHIP
CAPCOM timer 7 reload register
CAPCOM timer 8 reload register
Programming voltage identifier register
On-chip memory identifier register
Device identifier register (n is the device revision) 114nh
Doc ID 12303 Rev 3
147/235
STMICROELECTRONICS [ ST ]
