M27C160
Table 7. Read Mode DC Characteristics
(1)
(T
A
= 0 to 70 °C or –40 to 85 °C; V
CC
= 5V ± 5% or 5V ± 10%; V
PP
= V
CC
)
Symbol
I
LI
I
LO
Parameter
Input Leakage Current
Output Leakage Current
Test Condition
0V
≤
V
IN
≤
V
CC
0V
≤
V
OUT
≤
V
CC
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 8MHz
Supply Current
E = V
IL
, G = V
IL
,
I
OUT
= 0mA, f = 5MHz
I
CC1
I
CC2
I
PP
V
IL
V
IH (2)
V
OL
V
OH
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
I
OL
= 2.1mA
I
OH
= –400µA
2.4
E = V
IH
E > V
CC
– 0.2V
V
PP
= V
CC
–0.3
2
50
1
100
10
0.8
V
CC
+ 1
0.4
mA
mA
µA
µA
V
V
V
V
Min
Max
±1
±10
70
Unit
µA
µA
mA
I
CC
Note: 1. V
CC
must be applied simultaneously with or before V
PP
and removed simultaneously or after V
PP
.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Standby Mode
The M27C160 has a standby mode which reduces
the active current from 50mA to 100µA. The
M27C160 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current I
CC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E.
The magnitude of the transient current peaks is
dependent on the capacitive and inductive loading
of the device outputs. The associated transient
voltage peaks can be suppressed by complying
with the two line output control and by properly se-
lected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor is used on every
device between V
CC
and V
SS
. This should be a
high frequency type of low inherent inductance
and should be placed as close as possible to the
device. In addition, a 4.7µF electrolytic capacitor
should be used between V
CC
and V
SS
for every
eight devices.
This capacitor should be mounted near the power
supply connection point. The purpose of this ca-
pacitor is to overcome the voltage drop caused by
the inductive effects of PCB traces.
5/19
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