M25P64
SUMMARY DESCRIPTION
The M25P64 is a 64Mbit (8M x 8) Serial Flash
Memory, with advanced write protection mecha-
nisms, accessed by a high speed SPI-compatible
bus.
The memory can be programmed 1 to 256 bytes at
a time, using the Page Program instruction.
The memory is organized as 128 sectors, each
containing 256 pages. Each page is 256 bytes
wide. Thus, the whole memory can be viewed as
consisting of 32768 pages, or 8388608 bytes.
The whole memory can be erased using the Bulk
Erase instruction, or a sector at a time, using the
Sector Erase instruction.
Figure 2. Logic Diagram
VCC
Figure 3. VDFPN Connections
M25P64
S
Q
W
VSS
1
2
3
4
8
7
6
5
AI08595
VCC
HOLD
C
D
D
C
S
W
M25P64
Q
Note: 1. There is an exposed die paddle on the underside of the
MLP8 package. This is pulled, internally, to V
SS
, and
must not be allowed to be connected to any other voltage
or signal line on the PCB.
2. See
section for package di-
mensions, and how to identify pin-1.
Figure 4. SO Connections
M25P64
HOLD
HOLD
VCC
DU
DU
DU
DU
S
Q
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AI07486b
VSS
AI07485
Table 1. Signal Names
C
D
Q
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply Voltage
Ground
C
D
DU
DU
DU
DU
VSS
W
Note: 1. DU = Don’t Use
2. See
section for package di-
mensions, and how to identify pin-1.
S
W
HOLD
V
CC
V
SS
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