M24128, M24C64, M24C32
Table 18.
AC characteristics (V
CC
= 1.7 V to 5.5 V)
DC and AC parameters
Test conditions specified in
and
Symbol
f
C
t
CHCL
t
CLCH
t
DL1DL2(1)
t
DXCX
t
CLDX
t
CLQX
t
CLQV(2)
t
CHDX(3)
t
DLCL
t
CHDH
t
DHDL
t
W
Alt.
f
SCL
t
HIGH
t
LOW
t
F
Clock frequency
Clock pulse width high
Clock pulse width low
SDA fall time
600
1300
20
100
0
200
200
600
600
600
1300
10
900
300
Parameter
Min.
Max.
400
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
t
SU:DAT
Data in setup time
t
HD:DAT
Data in hold time
t
DH
t
AA
Data out hold time
Clock low to next data valid (access time)
t
SU:STA
Start Condition setup time
t
HD:STA
Start Condition hold time
t
SU:STO
Stop Condition setup time
t
BUF
t
WR
Time between Stop condition and next Start condition
Write time
1. Sampled only, not 100% tested.
2. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
3. For a reStart condition, or following a Write cycle.
25/35
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