M24C64
M24C32
64/32 Kbit Serial I²C Bus EEPROM
s
s
Compatible with I
2
C Extended Addressing
Two Wire I
2
C Serial Interface
Supports 400 kHz Protocol
Single Supply Voltage:
– 4.5V to 5.5V for M24Cxx
– 2.5V to 5.5V for M24Cxx-W
– 1.8V to 3.6V for M24Cxx-R
s
8
1
PSDIP8 (BN)
0.25 mm frame
8
1
TSSOP8 (DW)
169 mil width
s
s
s
s
s
s
s
s
Hardware Write Control
BYTE and PAGE WRITE (up to 32 Bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Behavior
1 Million Erase/Write Cycles (minimum)
40 Year Data Retention (minimum)
8
1
SO8 (MN)
150 mil width
8
1
SO8 (MW)
200 mil width
DESCRIPTION
These I
2
C-compatible electrically erasable pro-
grammable memory (EEPROM) devices are orga-
nized as 8192x8 bits (M24C64) and 4096x8 bits
(M24C32), and operate down to 2.5 V (for the -W
version of each device), and down to 1.8 V (for the
-R version of each device).
The M24C64 and M24C32 are available in Plastic
Dual-in-Line, Plastic Small Outline and Thin Shrink
Small Outline packages.
Figure 1. Logic Diagram
VCC
3
Table 1. Signal Names
E0, E1, E2
SDA
Chip Enable Inputs
Serial Data/Address Input/
Output
Serial Clock
Write Control
Supply Voltage
Ground
E0-E2
SCL
WC
M24C64
M24C32
SDA
SCL
WC
V
CC
V
SS
VSS
AI01844B
December 1999
1/19
STMICROELECTRONICS [ STMICROELECTRONICS ]
