M24C16, M24C08, M24C04, M24C02, M24C01
Figure 7. Write Mode Sequences with WC=1 (data write inhibited)
WC
ACK
ACK
NO ACK
DATA IN
Byte Write
DEV SEL
BYTE ADDR
R/W
WC
ACK
ACK
NO ACK
NO ACK
DATA IN 3
Page Write
DEV SEL
BYTE ADDR
DATA IN 1 DATA IN 2
R/W
WC (cont'd)
NO ACK
NO ACK
Page Write
(cont'd)
DATA IN N
AI02803C
Write Operations
the Start condition until the end of the address
byte), the device replies to the data byte with
NoAck, as shown in Figure 7., and the location is
not modified. If, instead, the addressed location is
not Write-protected, the device replies with Ack.
The bus master terminates the transfer by gener-
ating a Stop condition, as shown in Figure 8..
Following a Start condition the bus master sends
a Device Select Code with the Read/Write bit
(RW) reset to 0. The device acknowledges this, as
shown in Figure 8., and waits for an address byte.
The device responds to the address byte with an
acknowledge bit, and then waits for the data byte.
Page Write
When the bus master generates a Stop condition
immediately after the Ack bit (in the “10 bit” time
th
The Page Write mode allows up to 16 bytes to be
written in a single Write cycle, provided that they
are all located in the same page in the memory:
that is, the most significant memory address bits
are the same. If more bytes are sent than will fit up
to the end of the page, a condition known as ‘roll-
over’ occurs. This should be avoided, as data
starts to become overwritten in an implementation
dependent way.
The bus master sends from 1 to 16 bytes of data,
each of which is acknowledged by the device if
Write Control (WC) is Low. If the addressed loca-
tion is Write-protected, by Write Control (WC) be-
ing driven High (during the period from the Start
slot), either at the end of a Byte Write or a Page
Write, the internal Write cycle is triggered. A Stop
condition at any other time slot does not trigger the
internal Write cycle.
During the internal Write cycle, Serial Data (SDA)
and Serial Clock (SCL) are ignored, and the de-
vice does not respond to any requests.
Byte Write
After the Device Select code and the address byte,
the bus master sends one data byte. If the ad-
dressed location is Write-protected, by Write Con-
trol (WC) being driven High (during the period from
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STMICROELECTRONICS [ ST ]
