Register mapping
LIS3DH
7
Register mapping
The table given below provides a listing of the 8 bit registers embedded in the device and
the related addresses:
Table 17. Register address map
Register address
Name
Type
Default
Comment
Hex
Binary
Reserved (do not modify)
STATUS_REG_AUX
OUT_ADC1_L
OUT_ADC1_H
OUT_ADC2_L
OUT_ADC2_H
OUT_ADC3_L
OUT_ADC3_H
INT_COUNTER_REG
WHO_AM_I
00 - 06
07
Reserved
r
r
r
r
r
r
r
r
r
000 0111
000 1000
000 1001
000 1010
000 1011
000 1100
000 1101
000 1110
08
output
output
output
output
output
output
09
0A
0B
0C
0D
0E
0F
000 1111 00110011 Dummy register
Reserved
Reserved (do not modify)
TEMP_CFG_REG
CTRL_REG1
10 - 1E
1F
rw
rw
rw
rw
rw
rw
rw
rw
r
001 1111
20
010 0000 00000111
010 0001 00000000
010 0010 00000000
010 0011 00000000
010 0100 00000000
010 0101 00000000
010 0110 00000000
010 0111 00000000
CTRL_REG2
21
CTRL_REG3
22
CTRL_REG4
23
CTRL_REG5
24
CTRL_REG6
25
REFERENCE
STATUS_REG2
OUT_X_L
26
27
r
28
010 1000
010 1001
010 1010
010 1011
010 1100
010 1101
output
output
output
output
output
output
OUT_X_H
r
29
OUT_Y_L
r
2A
2B
2C
2D
2E
2F
OUT_Y_H
r
OUT_Z_L
r
OUT_Z_H
r
FIFO_CTRL_REG
FIFO_SRC_REG
INT1_CFG
rw
r
010 1110 00000000
010 1111
rw
30
011 0000 00000000
26/42
Doc ID 17530 Rev 1
STMICROELECTRONICS [ ST ]
