Digital interfaces
LIS3DH
6
Digital interfaces
2
The registers embedded inside the LIS3DH may be accessed through both the I C and SPI
serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
2
The serial interfaces are mapped onto the same pads. To select/exploit the I C interface, CS
line must be tied high (i.e. connected to Vdd_IO).
Table 10. Serial interface pin description
Pin name
Pin description
SPI enable
CS
I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
SCL
SPC
I2C serial clock (SCL)
SPI serial port clock (SPC)
SDA
SDI
I2C serial data (SDA)
SPI serial data input (SDI)
SDO
3-wire interface serial data output (SDO)
SA0
I2C less significant bit of the device address (SA0)
SPI serial data output (SDO)
SDO
6.1
I2C serial interface
2
2
The LIS3DH I C is a bus slave. The I C is employed to write data into registers whose
content can also be read back.
2
The relevant I C terminology is given in the table below.
Table 11. Serial interface pin description
Term
Description
The device which sends data to the bus
Transmitter
Receiver
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
Master
Slave
The device addressed by the master
2
There are two signals associated with the I C bus: the serial clock line (SCL) and the Serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines must be connected to Vdd_IO through external pull-up
resistor. When the bus is free both the lines are high.
2
2
The I C interface is compliant with fast mode (400 kHz) I C standards as well as with the
normal mode.
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Doc ID 17530 Rev 1
STMICROELECTRONICS [ ST ]
