L6563H
Application information
Figure 47. Interface circuits that let the L6563H switch on or off a PWM controller
21
ꢀ
3:0B6723
3:0B/$7&+
581
ꢀꢁ
ꢀꢀ
ꢇ
/ꢂꢃꢂꢅ+
/ꢂꢃꢂꢅ+
2))
8&ꢁꢇꢉ[ꢄꢄ; ꢀ
8&ꢄꢆꢇꢉ[ꢄ; ꢀ
/ꢌꢃꢌꢌ$ꢄꢄꢄ; ꢋ
/ꢌꢃꢋꢀꢄꢄꢄꢄꢄ; ꢊ
;
;
/ꢌꢃꢌꢌ$ꢄꢄꢄ; ꢇ
/ꢌꢃꢋꢀꢄꢄꢄꢄꢄ; ꢁ
/ꢌꢃꢋꢋ$ꢄꢄꢄ; ꢇ
3:0ꢇ5(6
FRQWUROOHU
3:0ꢇ5(6
FRQWUROOHU
/ꢌꢃꢋꢋ$ꢄꢄꢄ; ꢃꢄRUꢄꢊ
DꢈꢉꢉQRWꢉODWFKHG
EꢈꢉꢉODWFKHGꢉ
!-ꢀꢁꢁꢇꢁVꢄ
If the chip is provided with a soft-start pin, it is possible to delay the start-up of the dc-dc
stage with respect to that of the PFC stage, which is often desired, as described in
Figure 48. An underlying assumption in order for that to work properly is that the UVLO
thresholds of the PWM controller are certainly higher than those of the L6563H.
Figure 48. Interface circuits for power up sequencing when dc-dc has the SS
function
21
ꢀ
3:0B6723
581
ꢀꢁ
ꢀꢀ
/ꢂꢃꢂꢅ+
2))
66
;
/ꢌꢃꢌꢌ$ꢄꢄꢄ; ꢀꢉ
/ꢌꢃꢋꢀꢄꢄꢄꢄꢄ; ꢉ
/ꢌꢃꢋꢋ$ꢄꢄꢄ; ꢀ
3:0ꢇ5(6
FRQWUROOHU
&
66
!-ꢀꢁꢁꢇꢃVꢄ
If this is not the case or it is not possible to achieve a start-up delay long enough (because
this prevents the dc-dc stage from starting up correctly) or, simply, the PWM controller is
devoid of soft start, the arrangement of Figure 49 lets the dc-dc converter start-up when the
voltage generated by the PFC stage reaches a preset value. The technique relies on the
UVLO thresholds of the PWM controller.
Doc ID 16047 Rev 2
33/48
STMICROELECTRONICS [ ST ]
