L6563H
Application information
Essentially, the circuit artificially increases the ON-time of the power switch with a positive
offset added to the output of the multiplier in the proximity of the line voltage zero-crossings.
This offset is reduced as the instantaneous line voltage increases, so that it becomes
negligible as the line voltage moves toward the top of the sinusoid. Furthermore the offset is
modulated by the voltage on the VFF pin (see “Voltage Feedforward” section) so as to have
little offset at low line, where energy transfer at zero crossings is typically quite good, and a
larger offset at high line where the energy transfer gets worse.
The effect of the circuit is shown in Figure 42, where the key waveforms of a standard TM
PFC controller are compared to those of this chip.
To take maximum benefit from the THD optimizer circuit, the high-frequency filter capacitor
after the bridge rectifier should be minimized, compatibly with EMI filtering needs. A large
capacitance, in fact, introduces a conduction dead-angle of the AC input current in itself -
even with an ideal energy transfer by the PFC pre-regulator - thus reducing the effectiveness
of the optimizer circuit.
6.5
Tracking boost function
In some applications it may be advantageous to regulate the output voltage of the PFC pre-
regulator so that it tracks the RMS input voltage rather than at a fixed value like in
conventional boost pre-regulators. This is commonly referred to as “tracking boost” or
“follower boost” approach.
With the L6563H this can be realized by connecting a resistor (RT) between the TBO pin
and ground. The TBO pin presents a DC level equal to the peak of the MULT pin voltage and
is then representative of the mains RMS voltage. The resistor defines a current, equal to
V(TBO)/RT, that is internally 1:1 mirrored and sunk from pin INV (#1) input of the L6563H's
error amplifier. In this way, when the mains voltage increases the voltage at TBO pin
increases as well and so does the current flowing through the resistor connected between
TBO and GND. Then a larger current is sunk by INV pin and the output voltage of the PFC
pre-regulator is forced to get higher. Obviously, the output voltage moves in the opposite
direction if the input voltage decreases.
To avoid undesired output voltage rise should the mains voltage exceed the maximum
specified value, the voltage at the TBO pin is clamped at 3V. By properly selecting the
multiplier bias it is possible to set the maximum input voltage above which input-to-output
tracking ends and the output voltage becomes constant. If this function is not used, leave
the pin open: the device regulates a fixed output voltage.
Starting from the following data:
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Vin1 = minimum specified input RMS voltage;
Vin2 = maximum specified input RMS voltage;
Vo1 = regulated output voltage @ Vin = Vin1;
Vo2 = regulated output voltage @ Vin = Vin2;
Vox = absolute maximum limit for the regulated output voltage;
to set the output voltage at the desired values use the following design procedure:
Doc ID 16047 Rev 2
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STMICROELECTRONICS [ ST ]
