HCF4053B
TYPICAL BIAS VOLTAGES
The ADDRESS (digital-control inputs) and INHIBIT logic levels are : "0"=V
SS
and "1"=V
DD
. The analog signal (through the TG) may swing
from V
EE
to V
DD
SPECIAL CONSIDERATIONS
Control of analog signals up to 20V peak to peak
can be achieved by digital signal amplitudes of 4.5
to 20V (if V
DD
- V
SS
= 3V, a V
DD
- V
EE
of up to 13V
can be controlled; for V
DD
- V
EE
level differences
above 13V, a V
DD
- V
SS
of at least 4.5V is
required. For example, if V
DD
= +5, V
SS
= 0, and
V
EE
= -13.5, analog signals from -13.5V to 4.5V
can be controlled by digital inputs of 0 to 4.5V. In
TEST CIRCUIT
certain applications, the external load resistor
current may include both V
DD
and signal-line
components. To avoid drawing V
DD
current when
switch current flows into the transmission gate
inputs, the voltage drop across the bidirectional
switch must not exceed 0,8V (calculated from R
ON
values shown in DC SPECIFICATIONS). No V
DD
current will flow through R
L
if the switch current
flows into leads 4, 14 and 15.
C
L
= 50pF or equivalent (includes jig and probe capacitance)
R
L
= 200KΩ
R
T
= Z
OUT
of pulse generator (typically 50Ω)
6/10
STMICROELECTRONICS [ STMICROELECTRONICS ]
