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HCF4017M013TR 参数 Datasheet PDF下载

HCF4017M013TR图片预览
型号: HCF4017M013TR
PDF下载: 下载PDF文件 查看货源
内容描述: 10个解码输出十进制计数器 [DECADE COUNTER WITH 10 DECODED OUTPUTS]
分类和应用: 计数器触发器逻辑集成电路光电二极管输出元件PC
文件页数/大小: 11 页 / 379 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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HCF4017B
DECADE COUNTER WITH 10 DECODED OUTPUTS
s
s
s
s
s
s
s
s
MEDIUM SPEED OPERATION :
10 MHz (Typ.) at V
DD
= 10V
FULLY STATIC OPERATION
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25°C
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DIP
SOP
ORDER CODES
PACKAGE
DIP
SOP
TUBE
HCF4017BEY
HCF4017BM1
T&R
HCF4017M013TR
DESCRIPTION
The HCF4017B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4017B is 5-stage Johnson counter
having 10 decoded outputs. Inputs include a
CLOCK, a RESET, and a CLOCK INHIBIT signal.
Schmitt trigger action in the clock input circuit
provides pulse shaping that allows unlimited clock
input pulse rise and fall times. This counter is
advanced one count at the positive clock signal
transition if the CLOCK INHIBIT signal is low.
Counter advanced via the clock line is inhibited
when the CLOCK INHIBIT signal is high. A high
RESET signal clears the counter to its zero count.
Use of the Johnson decade-counter configuration
permits high speed operation, 2-input decimal
decode gating and spike-free decoded outputs.
Anti-lock gating is provided, thus assuring proper
counting sequence. The decoded outputs are
normally low and go high only at their respective
decoded time slot. Each decoded output remains
high for one full clock cycle. A CARRY - OUT
signal completes one cycle every 10 clock input
cycles and is used to ripple-clock the succeeding
device in a multi-device counting chain.
PIN CONNECTION
September 2001
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