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SST89E516RD2-40-C-NJE 参数 Datasheet PDF下载

SST89E516RD2-40-C-NJE图片预览
型号: SST89E516RD2-40-C-NJE
PDF下载: 下载PDF文件 查看货源
内容描述: FlashFlex MCU [FlashFlex MCU]
分类和应用: 外围集成电路微控制器PC时钟
文件页数/大小: 81 页 / 832 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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FlashFlex MCU  
SST89E516RD2 / SST89E516RD  
SST89V516RD2 / SST89V516RD  
Data Sheet  
9.0 SECURITY LOCK  
The security lock protects against software piracy and pre-  
vents the contents of the flash from being read by unautho-  
rized parties. It also protects against code corruption  
resulting from accidental erasing and programming to the  
internal flash memory. There are two different types of  
security locks in the device security lock system: hard lock  
and SoftLock.  
issued through the command mailbox register, SFCM, exe-  
cuted from a Locked (hard locked or soft locked) block, can  
be operated on a soft locked block: Block-Erase, Sector-  
Erase, Byte-Program and Byte-Verify.  
In external host mode, SoftLock behaves the same as a  
hard lock.  
9.3 Security Lock Status  
9.1 Hard Lock  
The three bits that indicate the device security lock  
status are located in SFST[7:5]. As shown in Figure 9-  
1 and Table 9-1, the three security lock bits control the  
lock status of the primary and secondary blocks of  
memory. There are four distinct levels of security lock  
status. In the first level, none of the security lock bits  
are programmed and both blocks are unlocked. In the  
second level, although both blocks are now locked and  
cannot be programmed, they are available for read  
operation via Byte-Verify. In the third level, three differ-  
ent options are available: Block 1 hard lock / Block 0  
SoftLock, SoftLock on both blocks, and hard lock on  
both blocks. Locking both blocks is the same as Level  
2, Block 1 except read operation isn’t available. The  
fourth level of security is the most secure level. It  
doesn’t allow read/program of internal memory or boot  
from external memory. For details on how to program  
the security lock bits refer to the external host mode  
and in-application programming sections.  
When hard lock is activated, MOVC or IAP instructions exe-  
cuted from an unlocked or soft locked program address  
space, are disabled from reading code bytes in hard locked  
memory blocks (See Table 9-2). Hard lock can either lock  
both flash memory blocks or just lock the 8 KByte flash  
memory block (Block 1). All external host and IAP com-  
mands except for Chip-Erase are ignored for memory  
blocks that are hard locked.  
9.2 SoftLock  
SoftLock allows flash contents to be altered under a secure  
environment. This lock option allows the user to update  
program code in the soft locked memory block through in-  
application programming mode under a predetermined  
secure environment. For example, if Block 1 (8K) memory  
block is locked (hard locked or soft locked), and Block 0  
memory block is soft locked, code residing in Block 1 can  
program Block 0. The following IAP mode commands  
UUU/NN  
PUU/SS  
Level 1  
Level 2  
UPU/SS  
UUP/LS  
Level 3  
UPP/LL  
PPU/LS  
PUP/LL  
UPP/LL  
Level 4  
PPP/LL  
1273 F26.0  
FIGURE  
9-1: Security Lock Levels  
Note: P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1), N = Not Locked, L = Hard locked, S = Soft locked  
©2007 Silicon Storage Technology, Inc.  
S71273-03-000  
1/07  
55  
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