FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
Data Sheet
8.3.4 Pulse Width Modulator
The Pulse Width Modulator (PWM) mode is used to gener-
ate 8-bit PWMs by comparing the low byte of the PCA
timer (CL) with the low byte of the compare register
(CCAPnL). When CL < CCAPnL the output is low. When
CL ≥ CCAPnL the output is high. To activate this mode, the
user must set the PWM and ECOM bits in the module’s
CCAPMn SFR. (See Figure 8-5 and Table 8-7)
loaded into the high byte (CCAPnH). Since writes to the
CCAPnH register are asynchronous, a new value written to
the high byte will not be shifted into CCAPnL for compari-
son until the next period of the output (when CL rolls over
from 255 to 00).
To calculate values for CCAPnH for any duty cycle, use
the following equation:
In PWM mode, the frequency of the output depends on the
source for the PCA timer. Since there is only one set of CH
and CL registers, all modules share the PCA timer and fre-
quency. Duty cycle of the output is controlled by the value
CCAPnH = 256(1 - Duty Cycle)
where CCAPnH is an 8-bit integer and Duty Cycle is a
fraction.
CCAPnH
CCAPnL
0
CL < CCAPnL
CEXn
Enable
8-bit Comparator
CL >= CCAPnL
1
CL
Overflow
PCA Timer/Counter
CCAPMn
ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn
n=0 to 4
1273 F24.0
0
0
0
0
0
FIGURE
8-5: PCA Pulse Width Modulator Mode
8-7: Pulse Width Modulator Frequencies
TABLE
PWM Frequency
PCA Timer Mode
1/12 Oscillator Frequency
1/4 Oscillator Frequency
Timer 0 Overflow:
8-bit
12 MHz
3.9 KHz
11.8 KHz
16 MHz
5.2 KHz
15.6 KHz
15.5 Hz
0.06 Hz
20.3 Hz
0.08 Hz
16-bit
8-bit Auto-Reload
External Input (Max)
3.9 KHz to 15.3 Hz
5.9 KHz
5.2 KHz to 20.3 Hz
7.8 KHz
T8-7.0 1273
©2007 Silicon Storage Technology, Inc.
S71273-03-000
1/07
53
SST [ SILICON STORAGE TECHNOLOGY, INC ]
