512 Kbit / 1 Mbit / 2 Mbit Many-Time Programmable Flash
SST27SF512 / SST27SF010 / SST27SF020
Data Sheet
AC CHARACTERISTICS
TABLE 11: READ CYCLE TIMING PARAMETERS VDD = 4.5-5.5V (TA = 0°C to +70°C (Commercial))
Symbol Parameter
Min
Max
Units
ns
TRC
TCE
TAA
Read Cycle Time
70
Chip Enable Access Time
Address Access Time
70
70
35
ns
ns
TOE
TCLZ
TOLZ
Output Enable Access Time
CE# Low to Active Output
OE# Low to Active Output
CE# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
ns
1
1
0
0
ns
ns
1
1
TCHZ
25
25
ns
TOHZ
ns
1
TOH
0
ns
T11.3 1152
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: PROGRAM/ERASE CYCLE TIMING PARAMETERS FOR SST27SF512
Symbol Parameter
Min
1
Max
Units
µs
TAS
Address Setup Time
TAH
Address Hold Time
1
µs
TPRT
TVPS
TVPH
TPW
TEW
TDS
OE#/VPP Pulse Rise Time
OE#/VPP Setup Time
50
1
ns
µs
OE#/VPP Hold Time
1
µs
CE# Program Pulse Width
CE# Erase Pulse Width
Data Setup Time
20
100
1
30
µs
500
ms
µs
TDH
TVR
Data Hold Time
1
µs
OE#/VPP and A9 Recovery Time
A9 Rise Time to 12V during Erase
A9 Setup Time during Erase
A9 Hold Time during Erase
1
µs
TART
TA9S
TA9H
50
1
ns
µs
1
µs
T12.0 1152
©2005 Silicon Storage Technology, Inc.
S71152-11-000
9/05
9
SST [ SILICON STORAGE TECHNOLOGY, INC ]
