8 Mbit SPI Serial Flash
SST25LF080A
EOL Product Data Sheet
TABLE 9: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
Maximum
12 pF
1
COUT
Output Pin Capacitance
Input Capacitance
VOUT = 0V
VIN = 0V
1
CIN
6 pF
T9.0 1248
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: RELIABILITY CHARACTERISTICS
Symbol
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
Units
Test Method
1
NEND
10,000
100
Cycles JEDEC Standard A117
1
TDR
Years
mA
JEDEC Standard A103
JEDEC Standard 78
1
ILTH
100 + IDD
T10.0 1248
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 11: AC OPERATING CHARACTERISTICS
Limits
20 MHz
33 MHz
Symbol
FCLK
Parameter
Serial Clock Frequency
Serial Clock High Time
Serial Clock Low Time
CE# Active Setup Time
CE# Active Hold Time
CE# Not Active Setup Time
CE# Not Active Hold Time
CE# High Time
Min
Max
Min
Max
Units
MHz
ns
20
33
TSCKH
TSCKL
20
20
13
13
ns
1
TCES
20
12
ns
1
TCEH
20
12
ns
1
TCHS
10
10
ns
1
TCHH
10
10
ns
TCPH
TCHZ
TCLZ
TDS
100
100
ns
CE# High to High-Z Output
SCK Low to Low-Z Output
Data In Setup Time
20
14
ns
0
5
0
3
ns
ns
TDH
THLS
THHS
THLH
THHH
THZ
Data In Hold Time
5
3
ns
HOLD# Low Setup Time
HOLD# High Setup Time
HOLD# Low Hold Time
HOLD# High Hold Time
HOLD# Low to High-Z Output
HOLD# High to Low-Z Output
Output Hold from SCK Change
Output Valid from SCK
Sector-Erase
10
10
15
10
10
10
10
10
ns
ns
ns
ns
20
20
14
14
ns
TLZ
ns
TOH
TV
0
0
ns
20
25
12
25
ns
TSE
ms
ms
ms
TBE
Block-Erase
25
25
TSCE
TBP
Chip-Erase
100
20
100
20
Byte-Program
µs
T11.0 1248
1. Relative to SCK.
©2006 Silicon Storage Technology, Inc.
S71248-06-EOL
1/06
19
SST [ SILICON STORAGE TECHNOLOGY, INC ]
