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SST25LF040A-33-4E-S2AE 参数 Datasheet PDF下载

SST25LF040A-33-4E-S2AE图片预览
型号: SST25LF040A-33-4E-S2AE
PDF下载: 下载PDF文件 查看货源
内容描述: 2兆位/ 4兆位的SPI串行闪存 [2 Mbit / 4 Mbit SPI Serial Flash]
分类和应用: 闪存内存集成电路光电二极管时钟
文件页数/大小: 26 页 / 301 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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2 Mbit / 4 Mbit SPI Serial Flash
SST25LF020A / SST25LF040A
Data Sheet
Read (20 MHz)
The Read instruction supports up to 20 MHz, it outputs the
data starting from the specified address location. The data
output stream is continuous through all addresses until ter-
minated by a low to high transition on CE#. The internal
address pointer will automatically increment until the high-
est memory address is reached. Once the highest memory
address is reached, the address pointer will automatically
increment to the beginning (wrap-around) of the address
space, i.e. for 4 Mbit density, once the data from address
location 7FFFFH had been read, the next output will be
from address location 00000H.
The Read instruction is initiated by executing an 8-bit com-
mand, 03H, followed by address bits [A
23
-A
0
]. CE# must
remain active low for the duration of the Read cycle. See
CE#
MODE 3
0 1 2 3 4 5 6 7 8
15 16
23 24
31 32
39 40
47
48
55 56
63 64
70
SCK
MODE 0
SI
MSB
SO
03
ADD.
MSB
HIGH IMPEDANCE
ADD.
ADD.
N
D
OUT
MSB
1242 F04.0
N+1
D
OUT
N+2
D
OUT
N+3
D
OUT
N+4
D
OUT
FIGURE 4: R
EAD
S
EQUENCE
©2006 Silicon Storage Technology, Inc.
S71242-05-000
1/06
9