2.4 GHz High-Power and High-Gain Power Amplifier
SST12LP15A
Data Sheet
PACKAGING DIAGRAMS
TOP VIEW
SIDE VIEW
BOTTOM VIEW
See notes
2 and 3
0.2
Pin #1
Pin #1
1.7
1.7
3.00
0.075
0.5 BSC
0.075
0.05 Max
0.45
0.35
3.00
0.075
1.00
0.80
0.30
0.18
1mm
16-vqfn-3x3-QVC-2.0
Note: 1. Complies with JEDEC JEP95 MO-220J, variant VEED-4 except external paddle nominal dimensions.
2. From the bottom view, the pin #1 indicator may be either a 45-degree chamfer or a half-circle notch.
3. The external paddle is electrically connected to the die back-side and possibly to certain V leads.
SS
This paddle can be soldered to the PC board; it is suggested to connect this paddle to the V of the unit.
SS
Connection of this paddle to any other voltage potential can result in shorts and/or electrical malfunction of the device.
4. Untoleranced dimensions are nominal target dimensions.
5. All linear dimensions are in millimeters (max/min).
FIGURE 16: 16-contact Very-thin Quad Flat No-lead (VQFN)
SST Package Code: QVC
TABLE 4: Revision History
Revision
Description
Date
00
01
Mar 2005
Mar 2006
•
•
•
•
•
•
•
•
•
Initial release of data sheet
Updated values for gain and efficiency on page 1
Updated values for VREG1 and VREG2 in Table 2 on page 4
Removed stability parameter from Table 3 on page 5
Updated the typical application schematic on page 9
Updated QVC package drawing.
Updated “Absolute Maximum Stress Ratings” on page 4
Added information for 2.3-2.4 and 2.5-2.6 applications
Removed leaded part numbers
02
Jul 2006
©2006 SST Communications Corp.
S71291-02-000
7/06
12
SST [ SILICON STORAGE TECHNOLOGY, INC ]
