FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
The table below summarizes various clock inputs at two common frequencies.
TABLE
8-2: PCA TIMER/COUNTER INPUTS
Clock Increments
PCA Timer/Counter Mode
Mode 0: fOSC/12
12 MHz
1 µsec
16 MHz
0.75 µsec
250 nsec
Mode 1:
330 nsec
Mode 2: Timer 0 Overflows1
Timer 0 programmed in:
8-bit mode
256 µsec
65 msec
192 µsec
49 µsec
16-bit mode
8-bit auto-reload
1 to 255 µsec
0.66 µsec
0.75 to 191 µsec
0.50 µsec
Mode 3: External Input MAX
T8-2.0 1255
1. In Mode 2, the overflow interrupt for Timer 0 does not need to be enabled.
The four possible CMOD timer modes with and without the overflow interrupt enabled are shown below. This list
assumes that PCA will be left running during idle mode.
TABLE
8-3: CMOD VALUES
CMOD Value
Without Interrupt Enabled
PCA Count Pulse Selected
Internal clock, fOSC/12
Internal clock, fOSC/4
Timer 0 overflow
With Interrupt Enabled
00H
02H
04H
06H
01H
03H
05H
07H
External clock at P1.2
T8-3.0 1255
The CCON register is associated with all PCA timer functions. It contains run control bits and flags for the PCA
timer (CF) and all modules. To run the PCA the CR bit (CCON.6) must be set by software. Clearing the bit, will turn
off PCA. When the PCA counter overflows, the CF (CCON.7) will be set, and an interrupt will be generated if the
ECF bit in the CMOD register is set. The CF bit can only be cleared by software. Each module has its own timer
interrupt or capture interrupt flag (CCF0 for module 0, CCF4 for module 4, etc.). They are set when either a match
or capture occurs. These flags can only be cleared by software. (See “PCA Timer/Counter Control Register
(CCON)” on page 27.)
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
52