FlashFlex51 MCU
SST89E52RD2 / SST89E54RD2 / SST89E58RD2 / SST89E516RD2
SST89V52RD2 / SST89V54RD2 / SST89V58RD2 / SST89V516RD2
Preliminary Specifications
1
TABLE
4-6: IAP COMMANDS FOR SST89E/V516RD2
Operation
Chip-Erase3
SFCM [6:0]2
01H
SFDT [7:0]
SFAH [7:0]
SFAL [7:0]
55H
55H
X
X4
AH
AH6
AH
AH
X
X
Block-Erase5
Sector-Erase5
Byte-Program5
Byte-Verify (Read)5
Prog-SB19
Prog-SB29
Prog-SB39
Prog-SC09
Enable-Clock-Double9
0DH
X
0BH
AL7
AL
AL
X
0EH
DI8
0CH
DO8
AAH
AAH
AAH
AAH
AAH
0FH
03H
X
X
05H
X
X
09H
5AH
55H
X
08H
X
T4-6.0 1255
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be VIL or VIH, but no other value.
5. Refer to Table 4-5 for address resolution
6. AH = Address high order byte
7. AL = Address low order byte
8. DI = Data Input, DO = Data Output, all other values are in hex.
9. Instruction must be located in Block 1 or external code memory.
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
1
TABLE
4-7: IAP COMMANDS FOR SST89E/V5XRD2
Operation
SFCM [6:0]2
01H
SFDT [7:0]
SFAH [7:0]
SFAL [7:0]
Chip-Erase3
Block-Erase
Sector-Erase
Byte-Program
Byte-Verify (Read)8
Prog-SB19
Prog-SB29
Prog-SB39
Prog-SC09
Prog-SC19
55H
55H
X
X4
AH5
AH
AH
AH
X
X
X
AL6
AL
AL
X
0DH
0BH
0EH
DI7
0CH
DO7
AAH
AAH
AAH
AAH
AAH
AAH
0FH
03H
X
X
05H
X
X
09H
5AH
AAH
55H
X
09H
X
Enable-Clock-Double9
08H
X
T4-7.0 1255
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
4. X can be VIL or VIH, but no other value.
5. AH = Address high order byte
6. AL = Address low order byte
7. DI = Data Input, DO = Data Output, all other values are in hex.
8. SFAH[7:5] = 111b selects Block 1, SFAH[7] = 0b selects Block 0
9. Instruction must be located in Block 1 or external code memory.
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
©2004 Silicon Storage Technology, Inc.
S71255-00-000
3/04
43
SST [ SILICON STORAGE TECHNOLOGY, INC ]
