CY28400-2
100 MHz Differential Buffer for PCI Express and SATA
• SMBus Block/Byte/Word Read and Write support
• 3.3V operation
Features
• CK409 and CK410 companion buffer
• Four differential 0.7V clock output pairs
• PLL Bypass-configurable
• Divide by 2 programmable outputs
• 28-pin SSOP and TSSOP packages
• OE_INV input for inverting OE, PWRDWN, and
SRC_STP active levels
• Individual OE controls
Functional Description
• Low CTC jitter (< 50 ps)
The CY28400-2 is a differential buffer and serves as a
companion device to the CK409 or CK410 clock generator.
The device is capable of distributing the Serial Reference
Clock (SRC) in PCI Express and SATA implementations.
• Programmable bandwidth
• SRC_STP power management control
Block Diagram
Pin Configuration
OE_INV
OE_1, OE_6
SRC_STP
DIFT1
DIFC1
VDD
SRCT_IN
SRCC_IN
VSS
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD_A
VSS_A
IREF
OE_INV
VDD
DIFT6
DIFC6
0E_6
DIFT5
DIFC5
VDD
Output
Control
PWRDWN
VDD
DIFT1
DIFC1
OE_1
DIFT2
DIFC2
VDD
DIFT2
DIFC2
SCLK
SMBus
Controller
SDATA
9
Output
Buffer
10
11
12
13
14
PLL/BYPASS#
DIFT5
DIFC5
PLL/BYPASS#
SCLK
SDATA
HIGH_BW#
SRC_STP
PWRDWN
SRCT_IN
SRCC_IN
28 SSOP/TSSOP
DIFT6
DIFC6
DIV
HIGH_BW#
PLL
Rev 1.0, November 21, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Page 1 of 15
Tel:(408) 855-0555 Fax:(408) 855-0550
www.SpectraLinear.com
SPECTRALINEAR [ SPECTRALINEAR INC ]
